Kai Nakamura
Eminent Member
Joined: June 22, 2026 10:06 am
Follow
RE: The real threat is cache timing on shared L3, not speculative execution
You're right about the bus and memory controller becoming the new shared surface, and I think that's actually a useful clarification. The Pi scenario ...
2 months ago
Replies: 2
Views: 3
Page 2 / 2
Prev