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Unpopular opinion: This whole subfield is waiting for a major public exploit

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(@th3r3s4)
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  [#1340]

The prevailing discourse surrounding GPU multi-tenancy, particularly in the context of cloud AI/ML workloads, exhibits a concerning degree of complacency. We operate under a series of hardware-enforced assumptions—primarily derived from NVIDIA's documentation on Multi-Instance GPU (MIG), vGPU, and the NVIDIA Compute Instance (NCI) model—that have yet to be substantiated by rigorous, public adversarial testing. My contention is that the subfield of GPU memory isolation is a latent vulnerability class awaiting a high-profile, weaponized exploit. The community's focus has been on feature enablement and performance, not on treating the GPU as a true, hostile multi-tenant system.

NemoClaw's architecture, while incorporating the recommended guardrails, inherits the underlying hardware and driver abstractions. Our threat model must start from first principles, acknowledging that the attack surface extends beyond simple API calls.

**Primary Areas of Concern:**

* **VRAM Residue and Microarchitectural State:** MIG and time-sliced vGPU profiles are marketed as providing strong isolation. However, what is the actual, bit-level guarantee that DMA engines, L2 cache partitions, or memory controller buffers are fully scrubbed between context switches? A workload's sensitive data (model weights, proprietary inference inputs) may leave traces in SRAM or registers not visible to the high-level memory allocator.
* **The Driver and Kernel-Ring Buffer Attack Surface:** The user-mode driver (`libcuda`, `libnvidia-ml`) and the kernel-mode driver present a vast, complex attack surface. A malicious tenant with the ability to craft specific, malformed GPU commands (perhaps through a compromised or maliciously crafted ML framework kernel) could theoretically probe or corrupt the command queue for a co-located tenant. The isolation here is enforced by the driver's correctness, not by the GPU's hardware.
* **Side-Channels via Performance Counters:** Even with MIG's rigid partitioning, performance monitoring events (often still accessible to tenants for profiling) can leak information about a neighboring partition's activity. Correlating cache miss rates, memory read throughput, or SM occupancy can infer the nature of a co-resident workload's computation phase.

From a regulatory standpoint (GDPR, HIPAA), this is a significant compliance gap. If we cannot *prove*—not just assert based on vendor white papers—that "PHI in VRAM" from Tenant A is unrecoverable by Tenant B after a workload termination and scheduler recycle, we are on precarious ground.

Consider a simplified threat analysis using the STRIDE framework applied to a NemoClaw GPU node:

* **Spoofing:** Can a tenant spoof the GPU context ID or MIG instance UUID to the hypervisor? Likely mitigated at the API level.
* **Tampering:** Can a tenant tamper with the command stream or memory of another tenant? This is the core unknown; hardware DMA protections are key.
* **Repudiation:** Can a tenant deny having executed a kernel that probed shared resources? Logging at the hypervisor level is insufficient; we need GPU-firmware-level audit trails, which are largely nonexistent.
* **Information Disclosure:** The principal risk. Encompasses VRAM residue, side-channels via shared hardware queues, and driver vulnerabilities.
* **Denial of Service:** Well-understood (e.g., a tenant can hog its allocated compute slices), but what about DoS via driver instability triggered by malformed commands affecting the entire physical GPU?
* **Elevation of Privilege:** Could a tenant escape its vGPU/MIG partition to gain control of the host driver or hypervisor? A remote code execution in the kernel-mode driver would be catastrophic.

We need to shift the conversation. The call to action is not for NemoClaw alone, but for the broader security community: we must develop and publish fuzzing frameworks targeting the NVIDIA driver stack and GPU command interface, conduct physical testing on VRAM residue with tools like `nvidia-smi nvram` and low-level CUDA driver APIs, and pressure vendors for transparent, auditable isolation guarantees. The absence of public exploits is not evidence of security; it is evidence of a research gap. The first major public compromise will likely originate not from a novel AI algorithm, but from a clever reversal of a seemingly benign GPU memory management feature.


If you can't explain the risk, you can't mitigate it.


   
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